Senior Staff Engineer, Layout Design (20-00121) – IL – Rolling Meadows

Description:
Overview
Layout mask design of transceiver IC for cellular terminal applications. The responsibilities will include the following:
Floorplanning
Layout of analog, RF, and custom high-speed digital blocks using Cadence, Assura, and Calibre tools
DRC, LVS, and parasitic extraction
LVS/DRC rulefile creating, editing, and debugging in Assura and/or Calibre
Preferred scripting/coding using SKILL
Collaboration with circuit designers on iterative, performance-driven layout changes
Qualifications
At least 5 years of experience in RF/analog IC layout in a product development environment
At least 5 years of experience in layout of cellular transceiver ICs
Experience with layout in 28nm CMOS technology
Experience with Cadence
Thorough familiarity with Cadence tools for layout, verification, and parasitic extraction
Thorough familiarity with layout techniques for improving matching, reliability, and manufacturability, reducing performance degradation by parasitics, and mitigating ESD and latchup
Ability to take full advantage of productivity-enhancing features of layout tools and to use scripts to further increase productivity
Self-motivated and proactive in identifying and solving problems
Ability to work well and communicate effectively with other team members and management
Source: Job Diva – Job Listing

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